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Hi Dears:
I got below warning after compiling:
"Warning: Found 43 output pins without output pin load capacitance assignment"
My question is that how to assign this assignment? What function of this assignment? And I can see some informations following this warning is below:
" Info: Pin "FPGA_OE" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis"
Is it mean that the QII would assign with a default value and we can ignore this warning?
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Hi Jerry,
the assignment would enhance the precision of the timing analysis. As long as you are not working on a highspeed interface like DDR2/DDR3 you can ignore the warning at the beginning. If you have this information ( maybe from your PCB tool) you can set this assignment in the Assignment Editor ( Ouput pin load). The Quartus deflaut value is 0 pF.
Kind regards
GPK
Honored Contributor
