How to prevent the synthesizer from optimizing signals away? Fanout?

We do not recommend that you edit the netlist or in the rtl viewer. The reason is

1) the project might be use by some other people and it would be really hard to debug when passing down.

2) doing it might cause large computer ram to be used

3) it will not be consistent.

if you have code that had been optimized away, you can right click the vhdl files -> insert template -> vhdl -> synthesis attributes.

Look for the attribute to preserve your code. After preserve your code, run the compilation again and see how the rtl viewer looks like. Most of the time, the code was optimized away due to dangling or connected to gnd.