How to prevent the synthesizer from optimizing signals away? Fanout?

Quartus II is generating the timing analysis. Is there a way to export directly to a .qar file? I have attached the report file form Quartus II. Please advise on how to get a .qar.

I did some floor planning of the logic elements manually and that seemed to help as it was placing some of the fast counters all over the place. I moved them close to the outputs and very near each other, and it helped. I intend to do more of this but tried to get a dual clock running first.

I wanted to just use 2 of the 4 clock lines and balance the usage manually but I can't find the option to force it no not optimize the second identical signal out.