Forum Discussion
Altera_Forum
Honored Contributor
12 years agosorry ,,, i found it
i should change DATA : std_logic_vector (0 to 6) ; ADDR : std_logic_vector (0 to 6)) to DATA : integer :=7 ; ADDR : integer :=7; but i ask you if i can enter data as in the table i mean word (asd,sdf,rto....etc) and is it right to use dual port ram thanks a lot