How to keep fpga in low power mode

the power consumption of ocillator is not important for me. device won't work with battery. i i can keep fpga in reset, that will be enough for me. also for using clock enable, i can wait for some seconds for the oscillator to let it be stabilized.

today i have seen another thing.

i will use multiple fpga configuration, passive serial (PS). it looks like if i keep nCONFIG LOW, the fpga will wait on reset state. Can i use this for lowering power consumption? also in case of the nCONFIG pin may be kept low for days or weeks. when not needed, i won't let it finish reset state. and can this damage the fpga?

please help..