How to Interface 10M04SCU169 with Host processor

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Thanks a Lot

Micro is RX631 169 BGA package from Renesas, Working on 3.3V VDD

FPGA is also working on single supply 3.3V voltage

RX631 is having 2 WAIT signal, 6 Chip Select, Write and Read signals and 24 address and 16 data lines

We have LAN9252 ESC interfaced to RX631 Micro by 4 address line and 15 Data Line

So, please guide us about How to interface FPGA to Micro and LAN9252 to FPGA using address and data line

i have attached pin mapping connection diagram

pls. revert back with suggestion and comments

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Sorry,

Micro is 100 LQFP package

and FPGA is 169 BGA package

Micro will read the DPRAM data (in FPGA ), its FPGA reads the timer pulses and stores the data in DPRAM register

then micro will read it - we have one more interface with FPGA and MIcro and i,e LAN9252

i am confused about connection between micro, FPGA , should A0 address bit required in interface?