how to increase frequency

You forgot to mention the most important point: Is it a combinational or edge sensitive always block. The speed result seems likely for a combinational one.

However, without considering the role of a clock in the design, the speed results are more or less meaningless. The discussion would be much easier, if you provide a complete design, including a clock.

Practically, you have a clock speed requirement, e.g. 50 MHz. Then the result means, that it isn't possible to perform the complete chain of caculations in one clock cycle. You have to split it across it at least two cycles. This is done automaticly by using edge sensitive always blocks. But you have to know first, how your input and output variables are related to the clock. However, if you intend to perform the complete calculation within a 50 MHz cycle, the result simply means: Give it up!