How to implement sspi command in uboot in Arria10 SoC Devkit

Hi

​

​There were no errors while launching Uboot.

boot has also been successful.

It did not affect Linux boot and behavior.

​

​The reason that sspi Write did not work properly was the difference in the "Read / Write Timing Diagram" of the system controller (MAX V).

CSn is not deasserted even at byte boundaries in Write, but is deasserted in Read.

To implement this Timing Diagram, you need to use the mode of the sspi command.

However, in the default uboot, the mode of the sspi command that succeeded the first time is to be used continuously in the next command, and the mode cannot be changed by the second command.

-> Cannot operate by switching Read / Write.

So I modified spi-uclass.c so that I could switch the mode for each command.

Specifically, just comment out "mode = plat-> mode;" on line 333 of spi_get_bus_and_cs ().

By doing this, you can switch the mode of the sspi command every time the command is issued and execute it.

However, for Read, Data is shifted regardless of which mode is used, and the MSB or LSB is lost.

There seems to be no problem with Write.

I think Write needs to work properly, so I don't think there is a problem at the moment.

=> sspi 0:0.3 16 02a0 ---> LED OK

=> sspi 0:0.0 16 0500

0075 ---> MSB is missing.

best regards