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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    I don't think there is a Quartus primitive that matches the ALU you're trying to create from the presentation. If you're planning to capture a Quartus schematic implementing this you'll have to use lower level primitives if you want to build the ALU as detailed in the presentation.

    This would be very easy to implement in rtl (verilog or VHDL)...:)