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Chloé_Russell's avatar
Chloé_Russell
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6 years ago

How to generate JIC file for NIOSII system without JTAG debug module?

I've worked with NIOSII system + JTAG debug module and everything was correctly done. Than following my new system configuration I've disabled JTAG module in NIOSII and initialized my onchip memory using HEX file while compiling my system I suppose that the onchip memory is initialized with HEX file (not empty it is generated from my soft using Make targets option and resized with Quartus than set as initialization file). After generation of JIC file, I've no results. What would be the problem after removing JTAG debug module?

3 Replies

  • MEIYAN_L_Intel's avatar
    MEIYAN_L_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    6 years ago

    Hi,

    As you have mentioned "I've no results", can you explain more on this?

    After you generate the .jic file, may I know what the steps have you done after?

    Thanks

    • Chloé_Russell's avatar
      Chloé_Russell
      Icon for New Contributor rankNew Contributor
      6 years ago
      Hi, Thank you for responding me. After loading my JIC file on board, I’ve expected simple message display in terminal, I wrote a simple code to test my UART receive and transmit functions with printf() and scanf() as you can see it here below: #include <stdio.h> int main() { char str[50]= "Hello !!\n"; printf("Initial = %s \n",str); printf("Enter your character = \n"); scanf("%s",str); printf("str = %s",str); return 0; } The same test has correctly running on my system NIOSII with Jtag debug module using JIC file. Regards
  • MEIYAN_L_Intel's avatar
    MEIYAN_L_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    6 years ago

    Hi,

    According to https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/nios2/n2cpu_nii5v1.pdf, JTAG debug module used to provide on-chip emulation features to control the processor remotely from a host PC. Firstly, the design was compiled, then the .sof file and .hex file was generated. These files will be coverted to .jic file. The .jic file is used to configure the data from the host to flash device. Since, the JTAG debug module is disable, then the .jic file is not download to the memory. Hence, there is no result came out.

    You have to enable JTAG debug module to solve this problem.

    Thanks