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Altera_Forum
Honored Contributor
16 years agoHow to finish the altpciechdma.c driver?
I've downloaded the altpciechdma.c driver for the Altera Arria GX dev kit.
The char part of it is not yet finished (due to the comments). And a module is missign "mapper_user_to_sg.h". Smb has tried to finish this part of the driver by himself? Or maybe I've missed the "mapper_user_to_sg.h" module? I need to talk to the driver from userspace. (Using LInux 2.6.25)22 Replies
- Altera_Forum
Honored Contributor
Anyone figured this out?
I spent a few days trying to get to this point. The DMA test works fine now, but I'd like to register the character device and I am missing that mapper_user_to_sg.h file. I can't seem to find it anywhere on google, I wonder if it's just a placeholder or if the file actually exists somewhere... If anyone managed to solve this issue help would be much appreciated. Thank you! - Altera_Forum
Honored Contributor
Char device operations are already implemented in this kernel module. Just comment this include file. You will not find him . :-)
- Altera_Forum
Honored Contributor
Thanks for the reply!
I get this kind of errors when commenting the include file: error: dereferencing pointer to incomplete type error: implicit declaration of function ‘sg_create_mapper’ error: implicit declaration of function ‘sg_destroy_mapper’ error: implicit declaration of function ‘sgm_map_user_pages’ error: implicit declaration of function ‘sgm_unmap_user_pages’ error: variable ‘sg_fops’ has initializer but incomplete type error: unknown field ‘owner’ specified in initializer error: unknown field ‘open’ specified in initializer error: unknown field ‘release’ specified in initializer error: unknown field ‘write’ specified in initializer error: implicit declaration of function ‘alloc_chrdev_region’ error: implicit declaration of function ‘unregister_chrdev_region’ After further googling I found this code: svn.assembla.com/svn/altpciechdma/user_dma_sg.c It has some of the missing functions in it. With some approximate copy/pasting I can get the driver to compile and the char device functionalities to (apparently) work. Thank you :). - Altera_Forum
Honored Contributor
Hi everyone.
I've been trying to get the 'DMA test' working for some time now, but without any success. Nevertheless, the 'probe()' function works well. Would anyone kindly provide some ideas of what may I be overlooking? Best regards. - Altera_Forum
Honored Contributor
Hi
Please, post the dmesg output. Regards, Igor - Altera_Forum
Honored Contributor
Hi Igor.
Thanks for you reply. Here goes the dmesg output: [ 332.548209] altpciechdma exit(), built at Jan 4 2012 11:49:31 [ 339.762209] altpciechdma init(), built at Dec 31 2007 19:54:16 [ 339.762273] probe(dev = 0xf7025800, pciid = 0xf8262cc0) [ 339.762283] probe() ape = 0xef8826c0 [ 339.762290] sizeof(struct ape_chdma_table) = 4096. [ 339.762306] table_virt = ee50a000, table_bus = 0x 2e50a000. [ 339.762336] altpciechdma 0000:01:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16 [ 339.762360] altpciechdma 0000:01:00.0: setting latency timer to 64 [ 339.762454] altpciechdma 0000:01:00.0: irq 28 for MSI/MSI-X [ 339.762478] Enabled MSI interrupting. [ 339.762581] Using a 64-bit DMA mask. [ 339.762595] IRQ pin# 1 (0=none, 1=INTA#...4=INTD#). [ 339.762605] IRQ line# 11. [ 339.762650] Succesfully requested IRQ# 28 with dev_id 0xef8826c0 [ 339.762661] BAR0 0xd2100000-0xd2100fff flags 0x0012120c [ 339.762669] BAR2 0xfe500000-0xfe507fff flags 0x00020200 [ 339.762727] BAR[0] mapped at 0xf827a000 with length 4096(/4096). [ 339.762759] BAR[2] mapped at 0xf827e000 with length 256(/32768). [ 339.762768] bar_tests(), PAGE_SIZE = 0x1000 [ 339.762776] write_header = 0xf827e000. [ 339.762783] read_header = 0xf827e010. [ 339.762790] &write_header->w3 = 0xf827e00c [ 339.762796] &read_header->w3 = 0xf827e01c [ 339.762802] ape->table_virt = 0xee50a000. [ 339.762828] Allocated cache-coherent DMA buffer (virtual address = ef678000, bus address = 0x000000002f678000). [ 339.762859] writing 0x000400ff to 0xf827e010 [ 339.762868] writing 0x00000000 to 0xf827e014 [ 339.762876] writing 0x2e50a000 to 0xf827e018 [ 339.762883] Flush posted writes [ 339.762888] [ 339.762891] Start DMA read [ 339.762898] writing 0x000000fe to 0xf827e01c [ 339.762906] EPLAST = 64222 [ 339.762911] POLL FOR READ: [ 339.762918] EPLAST = 64222, n = 254 [ 339.763026] EPLAST = 64222, n = 254 [ 339.763136] EPLAST = 64222, n = 254 ... [ 339.773754] EPLAST = 64222, n = 254 [ 339.773870] [ 339.773874] Start DMA write [ 339.773881] POLL FOR WRITE: [ 339.773888] EPLAST = 64222, n = 254 [ 339.773997] EPLAST = 64222, n = 254 [ 339.774108] EPLAST = 64222, n = 254 ... [ 339.784752] EPLAST = 64222, n = 254 [ 339.784867] [ef678000] = 0xef678000 != [ef67a000] = 0xef67a000 ?! [ 339.784879] [ef678004] = 0xef678004 != [ef67a004] = 0xef67a004 ?! [ 339.784890] [ef678008] = 0xef678008 != [ef67a008] = 0xef67a008 ?! [ 339.784901] [ef67800c] = 0xef67800c != [ef67a00c] = 0xef67a00c ?! [ 339.784911] [ef678010] = 0xef678010 != [ef67a010] = 0xef67a010 ?! [ 339.784922] [ef678014] = 0xef678014 != [ef67a014] = 0xef67a014 ?! [ 339.784933] [ef678018] = 0xef678018 != [ef67a018] = 0xef67a018 ?! [ 339.784943] [ef67801c] = 0xef67801c != [ef67a01c] = 0xef67a01c ?! [ 339.784954] [ef678020] = 0xef678020 != [ef67a020] = 0xef67a020 ?! [ 339.784962] ---more errors follow! not printed--- [ 339.784970] DMA loop back test FAILED. [ 339.784983] bar_tests() end, result -1 [ 339.784990] probe() successful. I'm using a Atom processor which is running Ubuntu 10.04 32 bits, and a Altera Arria II GX with the PCI / Chaining DMA example synthesized on Quartus 11.1. I've been around this for some days now, so any suggestion would be greatly appreciated. Best regards, Pedro - Altera_Forum
Honored Contributor
Hi pete_san
My problem is the same of yours. Do you find same solution? Best regards - Altera_Forum
Honored Contributor
Hi haulisson.
What's your setup? Are you following any kind of tutorial/document? Best regards, Pedro - Altera_Forum
Honored Contributor
Hi pete_san,
I have a host PC running linux (Ubuntu 10.04 LTS 64) and connected to an DE4 Stratix IV over PCIe. I explore the use of the FPGA as co-processor, but i get same problem of yours. Yes, I follow this tutorial (http://www.google.com.br/url?sa=t&rct=j&q=&esrc=s&source=web&cd=5&ved=0cewqfjae&url=http%3a%2f%2fsoftware.intel.com%2ffile%2f42901&ei=blb7t4tnmyyugqeapiszaw&usg=afqjcnf90cjh8c7rcs5pauelhv2jip6cja) and it work fine at Windows. I saw in your design that you used 15 bit in BAR but only has mapped 8 bit, it's correct! Best Regards, Haulisson - Altera_Forum
Honored Contributor
Hi Haulisson.
After checking the document, I think the DMA core you're using is not the one the kernel module is designed to use. The 'altpciechdma.c' is oriented for the chaining DMA core, which I don't exactly know where it is described, but you can find references to it in the chapter 15 of 'IP Compile for PCI Express User Guide' Altera document. But I believe the document you showed me uses the standard DMA core. When instantiating the DMA core in the Qsys, click in the button 'Documentation' to get its datasheet. I believe you'll find that the registers configured by the kernel module do not match those of the datasheet. If that's the case, you might have to alter the module's 'dma_test' function yourself, to configure the DMA core registers. Best regards, Pedro