How to finish the altpciechdma.c driver?

Hi Igor.

Thanks for you reply. Here goes the dmesg output:

[ 332.548209] altpciechdma exit(), built at Jan 4 2012 11:49:31

[ 339.762209] altpciechdma init(), built at Dec 31 2007 19:54:16

[ 339.762273] probe(dev = 0xf7025800, pciid = 0xf8262cc0)

[ 339.762283] probe() ape = 0xef8826c0

[ 339.762290] sizeof(struct ape_chdma_table) = 4096.

[ 339.762306] table_virt = ee50a000, table_bus = 0x 2e50a000.

[ 339.762336] altpciechdma 0000:01:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16

[ 339.762360] altpciechdma 0000:01:00.0: setting latency timer to 64

[ 339.762454] altpciechdma 0000:01:00.0: irq 28 for MSI/MSI-X

[ 339.762478] Enabled MSI interrupting.

[ 339.762581] Using a 64-bit DMA mask.

[ 339.762595] IRQ pin# 1 (0=none, 1=INTA#...4=INTD#).

[ 339.762605] IRQ line# 11.

[ 339.762650] Succesfully requested IRQ# 28 with dev_id 0xef8826c0

[ 339.762661] BAR0 0xd2100000-0xd2100fff flags 0x0012120c

[ 339.762669] BAR2 0xfe500000-0xfe507fff flags 0x00020200

[ 339.762727] BAR[0] mapped at 0xf827a000 with length 4096(/4096).

[ 339.762759] BAR[2] mapped at 0xf827e000 with length 256(/32768).

[ 339.762768] bar_tests(), PAGE_SIZE = 0x1000

[ 339.762776] write_header = 0xf827e000.

[ 339.762783] read_header = 0xf827e010.

[ 339.762790] &write_header->w3 = 0xf827e00c

[ 339.762796] &read_header->w3 = 0xf827e01c

[ 339.762802] ape->table_virt = 0xee50a000.

[ 339.762828] Allocated cache-coherent DMA buffer (virtual address = ef678000, bus address = 0x000000002f678000).

[ 339.762859] writing 0x000400ff to 0xf827e010

[ 339.762868] writing 0x00000000 to 0xf827e014

[ 339.762876] writing 0x2e50a000 to 0xf827e018

[ 339.762883] Flush posted writes

[ 339.762888]

[ 339.762891] Start DMA read

[ 339.762898] writing 0x000000fe to 0xf827e01c

[ 339.762906] EPLAST = 64222

[ 339.762911] POLL FOR READ:

[ 339.762918] EPLAST = 64222, n = 254

[ 339.763026] EPLAST = 64222, n = 254

[ 339.763136] EPLAST = 64222, n = 254

...

[ 339.773754] EPLAST = 64222, n = 254

[ 339.773870]

[ 339.773874] Start DMA write

[ 339.773881] POLL FOR WRITE:

[ 339.773888] EPLAST = 64222, n = 254

[ 339.773997] EPLAST = 64222, n = 254

[ 339.774108] EPLAST = 64222, n = 254

...

[ 339.784752] EPLAST = 64222, n = 254

[ 339.784867] [ef678000] = 0xef678000 != [ef67a000] = 0xef67a000 ?!

[ 339.784879] [ef678004] = 0xef678004 != [ef67a004] = 0xef67a004 ?!

[ 339.784890] [ef678008] = 0xef678008 != [ef67a008] = 0xef67a008 ?!

[ 339.784901] [ef67800c] = 0xef67800c != [ef67a00c] = 0xef67a00c ?!

[ 339.784911] [ef678010] = 0xef678010 != [ef67a010] = 0xef67a010 ?!

[ 339.784922] [ef678014] = 0xef678014 != [ef67a014] = 0xef67a014 ?!

[ 339.784933] [ef678018] = 0xef678018 != [ef67a018] = 0xef67a018 ?!

[ 339.784943] [ef67801c] = 0xef67801c != [ef67a01c] = 0xef67a01c ?!

[ 339.784954] [ef678020] = 0xef678020 != [ef67a020] = 0xef67a020 ?!

[ 339.784962] ---more errors follow! not printed---

[ 339.784970] DMA loop back test FAILED.

[ 339.784983] bar_tests() end, result -1

[ 339.784990] probe() successful.

I'm using a Atom processor which is running Ubuntu 10.04 32 bits, and a Altera Arria II GX with the PCI / Chaining DMA example synthesized on Quartus 11.1.

I've been around this for some days now, so any suggestion would be greatly appreciated.

Best regards,

Pedro