Forum Discussion
Altera_Forum
Honored Contributor
12 years agothanks arco,
I found it in pcie_ddr2_a2gx. it is not so obvious in qsys (perhaps none). this will set the appropriate TLP in altpcierd_cdma_app_icm_ddr which eventually controls altpcierd_dma_dt, etc... i was thinking to do my hardware development with reference design with qsys since it is simpler, but i think pcie_ddr2_a2gx is more detailed in implementations also complex. or do you know how to set these things in Qsys? thanks once again.