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Altera_Forum's avatar
Altera_Forum
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14 years ago

How to design a pwm generator?

I intend to design a PWM block by Freq input(interger 16bit ).

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Now I use a division IP core to caculate the counter by a fixed value divide a "16bit freq" which can reach my goal.But is it a simple way to generate the PWM by a 16bit interger Freq input?I'm really appreciate for your idea!

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    A pwm generator has two parameters, frequency and duty cycle, so it's not clear what you want to achieve. Generating a pulse frequency proportional to control variable can be easily done by a standard NCO scheme: adding the frequency control word continuously to a phase accumulator.

  • Altera_Forum's avatar
    Altera_Forum
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    Fvm,thanks for the quick response.I do know the NCO function in quartus,which I want to achieve is generate a adjustable freq 50% duty square waveform.And use as less logic cell as possible. I think how to process the freq value is the key.

  • Altera_Forum's avatar
    Altera_Forum
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    signal freq: unsigned(15 downto 0);
    signal accu: unsigned(19 downto 0);
    if rising_edge(clk) then
      accu <= accu + freq;
    end if;
    square_out <= accu(19);