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Altera_Forum
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14 years ago

How to design a pwm generator?

I intend to design a PWM block by Freq input(interger 16bit ). ----------------------------------------------------------------------- Now I use a division IP core to caculate the counter by a...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

signal freq: unsigned(15 downto 0);
signal accu: unsigned(19 downto 0);
if rising_edge(clk) then
  accu <= accu + freq;
end if;
square_out <= accu(19);