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Altera_Forum's avatar
Altera_Forum
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11 years ago

How to craete a 1 microsecond interval Timer of HPS ?

What HWLIB APIs should I use to configure a Timer of HPS with a 1 micro-second interval ?

How can I get the Timer Input Clock frequency and set the appropriate count into Timer ?

Thanks

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    Thanks.

    I have modify the example project , to set a Timer with 20KHz / 80KHz ( 12.5us period), in Timer ISR, I will toggle the LED in FPGA side . So that I can measure the time with SignalTap-II.

    OSC1_TMR0, 20KHz / 80KHz is fine, almost approached.

    But when I send OSC1_TMR0 timer with 1 MHz, the result is slower than I expected. Why ? ( It should have 1us interval, but I measured 6.5us...)

    [20KHz]

    https://www.alteraforum.com/forum/attachment.php?attachmentid=9194

    [80KHz]

    https://www.alteraforum.com/forum/attachment.php?attachmentid=9195

    [1M Hz]

    https://www.alteraforum.com/forum/attachment.php?attachmentid=9193
  • Altera_Forum's avatar
    Altera_Forum
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    ============= OSC1_TMR0 ===========

    Input clock (OSC1) freq = 25000000 Hz

    desire freq is 1000000 Hz.

    timer count is 25 .alt_gpt_reset_value_get(), count = 25.

    INFO: Timer Period in microseconds is 1.

    INFO: Timer running at 961538Hz.

    ============= SP_TMR0 ===========

    Input clock freq = 100000000 Hz

    desire freq is 1000000 Hz.

    timer count is 100 . alt_gpt_reset_value_get(), count = 100.

    INFO: Timer Period in microseconds is 1.

    INFO: Timer running at 990099Hz.

  • Altera_Forum's avatar
    Altera_Forum
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    May be errors in forum engine -- I see all 3 pictures, refresh htis page and in small popup window see:

    --- Quote Start ---

    Click image for larger version

    Name: 20KHz.jpg

    Vievs: 0

    Size: 52.3 KB

    ID: 9194

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    6.5 us may be decreased if modyfy CFLAGS in Makefile from -O0 (Debug) to -O3 or -Ot (if present such key for time optimisation). On Release compiler must generate much faster code for Altera-s interrupts global handler in alt-interrupt.c and yours with LED blinking.

    If slow code, many interrupt demands glues to one in waiting for service if serviced previous pack, system not run good code, stay cyclic in interrupt handler.

    May go to Disassebbler window and step there all way of executing and sum all ASM commands in both variants, -O0 and -O3.

    I reads books about Windows device drivers system, there described that Windows may process 2-3 thousand of interrupts per second: very complicated mechanism of processing with many filters.
  • Altera_Forum's avatar
    Altera_Forum
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    using -O3, it get better timing with 3us...

    using -Og, gets 3.02us

    using -Os, gets 3.62us
  • Altera_Forum's avatar
    Altera_Forum
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    Something feeble optimisation, and if smooth change frequency from 100 KHz to 1 MHz, may be line with 45, in 3 go to gorisontal line ?

    If HPS runned on 800 MHz, on 1 MHz Timer its 800 tacts for processing one interrupt.

    Something is wrong there, need be set ASM-handler instead Altera-s or even if edit alt_int_handler_irq() to optimising, although there all is need...

    May be cache missing ? Your wait code is which ?

    Or to LED wtiting is too big ?

    May write version of code with polling timer out register -- it really may catch all edges!

    And organize the contest to max cathing frequence !.. :)