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Altera_Forum
Honored Contributor
12 years agoACEX and APEX are very old devices (like 20 years old!) when gate count probably had a little more meaning to an FPGA. Now, because a single LUT can have between 4 and 6 inputs, it can implement anything from 1 gate to many of gates in a single LUT. So its very difficult to get a gate count equivolence.