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In your code you have tyhe following stuctures
assign flg_oc_2 = flg_oc_1;
always @ (posedge out_feed or posedge flg_oc_2)
begin
if (out_feed)
begin
flg_block_drive_1 <= 1'b0;
end
else if (flg_oc_2)
begin
flg_block_drive_1 <= 1'b1;
end
end
You may be assuming that flg_oc_2 is just a strobe but in fact the coding style infers a clock!
The above code will infer a FlipFlop for flg_block_drive_1 with flg_oc_2 as a clock input.
So the warning is correct.
Hope this helps
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After looking into the RTL view of the Quartus project I found, that the output of the register is driving the clock input of another FF. Quartus has to treat this signal as a clock. The warning is correct.
Honored Contributor
