how does quartus decide to remove logic?

this particular design has a CPU booting off its internal memory (which I am manually loading via code running during reset) which takes data almost directly from the top layer (which doesn't get synthesized away) and drives data back up to the top layer... There are floating nets that I grounded, so I'll start by taking a closer look at those. This particular IP vendor seems to like using IO buffers to implement multiple drivers of control pins (jeez), so there's probably an issue here also...