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New ContributorHow do you determine the PLL lock ranges for Arria10 PLLs?
Quartus used to report the min and max pll input frequencies in the PLL Usage Summary report. Where is that information now?
I have a source synchronous design there the transmitting device can have a different clock rate depending on some settings. I need to know my switch over points for PLL reconfiguration and I need to come up with a minimum number of settings to cover my desired range.
1 Reply
AnandRaj_S_IntelRegular Contributor
Hi Brian,
Yes, Quartus does not report the Minimum/Maximum lock input frequency for the PLL.
However we have to manually calculate it.
Fin min = VCO min frequency x N / M x C
Fin max = VCO max frequency x N / M x C
C/K is Post-scale counter.
For VCO min/max frequency refer respective device Datasheet.
Please go through below KDB link for more information.
https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/solutions/rd07262010_609.html
Let me know if this has helped resolve the issue you are facing or if you need any further assistance.
Regards
Anand
