New ContributorI'm working on the PCIe for a Cyclone 10 GX 10C085 and I have a question regarding the REFCLK for the PCIe.
How do I know if the reference clock should go in REFCLK_GXBL1C_CHT or REFCLK_GXBL1C_CHB (T or B)?
ContributorThe PCIe Hard IP placement always starts at bottom transceiver block.
T: Top
B: Bottom
So please assign the pcie refclk pin to the Bottom location REFCLK_GXBL1C_CHB (B)
New ContributorThanks, that is what I will do! Is there anywhere specific in the documentation that I could have found that information?
Is REFCLK_GXBL1C_CHB required (REFCLK_GXBL1C_CHT wouldn't work) or is it just preferred (easier fitting or something like that)?
ContributorI repost the reply.
You can download and refer to the Device pin-out file of '10CX085' from below link:
https://www.intel.com/content/www/us/en/support/programmable/support-resources/devices/lit-dp.html
It is required to use REFCLK_GXBL1C_CHB.
Inside the pin out file:
ContributorYou can download and refer to the Device pin-out file of '10CX085' from below link:
https://www.intel.com/content/www/us/en/support/programmable/support-resources/devices/lit-dp.html
It is required to use REFCLK_GXBL1C_CHB.
Inside the pin out file:
New ContributorDid you post some images? I can't tell for certain, but it looks like the images aren't showing up in the post.
