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- a_x_h_75
Contributor
In Quartus, in the 'Pin Planner' (under Assignments) for your FPGA design, change the 'I/O standard' of the relevant signals to LVDS.
Cheers,
Alex
- Rahul_S_Intel1
Frequent Contributor
Hi ,
The DE2-115 Board is board from Terasic, the information available from the below Terasic link.
https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=163&No=502&PartNo=4
From Intel kindly find the below link
Regards,
RS
- AAvil2
New Contributor
Thank you so much for your support, both answers was really helpful, i made it work.
kind regards
Alejandro