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a_x_h_75
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7 years agoIn Quartus, in the 'Pin Planner' (under Assignments) for your FPGA design, change the 'I/O standard' of the relevant signals to LVDS.
Cheers,
Alex
In Quartus, in the 'Pin Planner' (under Assignments) for your FPGA design, change the 'I/O standard' of the relevant signals to LVDS.
Cheers,
Alex
In Quartus, in the 'Pin Planner' (under Assignments) for your FPGA design, change the 'I/O standard' of the relevant signals to LVDS.
Cheers,
Alex