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Altera_Forum
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15 years ago

How can I make my design smaller in a MAX3000

Hi all! I seem to have run into some trouble with a MAX3000A Device. I had to port over some code that was created in a .bdf (with some AHDL) to VHDL. It was a pretty straight forward process ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

It seems that I'm getting this message that takes some time and gives me some macro cells:

Info: Promoted pin-driven signal(s) to global signal

Info: Promoted clock signal driven by pin "clk" to global clock signal

Does anyone know a work around for this?