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Altera_Forum's avatar
Altera_Forum
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14 years ago

How and where is boot-loader copied into FPGA

Hello,

I am trying to understand the process how a bootloader and my application is loaded into a NIOS II processor configured in a 3C25-FPGA with EPCS-flash.

I understand that the bootloader is loading my application into internal or external RAM and start executing it but how is this bootloader loaded into the FPGA.

Where is this bootloader loaded in the FPGA?

Why do I need to have a bootloader. Can I not place my application-code at the bootloader-space in the EPCS-flash and load/execute my application instead of the boot-loader.

I can understand having a bootloader when the boot-loader is part of the FPGA-configuration-data and is loaded together with the NIOS II processor-design.

Thank you all for your responses and best regards,

Wamor

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    Hi,

    The bootloader is located within the EPCS Controller which you have included into your NIOS system (using either SOPC or QSys).

    The bootloader code is in the first 1kB area of the EPCS Controller address space. That's why you have to set the NIOS CPU's reset vector to the beginning of the EPCS Controller's address space so that the CPU would start running the bootloader code from there.

    Because the EPCS Controller address space in NIOS system is only 0x7FF, you can't place your application code into that area like you would do with parallel flash device (which is fully accessable in the NIOS address space). And that's why you need the bootloader to copy the data from the EPCS to the main memory.

    More details can be found from the following Altera documents:

    - Embedded Peripherals IP User Guide (the section "EPCS Serial Flash Controller Core")

    - Application note 458 "Alternative Nios II Boot Methods"

    Regards,

    Jari