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SWrig4's avatar
SWrig4
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6 years ago

Hold time violations in ALTLVDS_RX with 300 MHz input clock

We are using ALTLVDS_RX to receive high-speed serial data in our design. We have been successfully using this design with 400 MHz input clock (800 Mbps) for a while. We are now trying to use the sam...
SWrig4's avatar
SWrig4
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6 years ago

I have implemented these changes in our "real" design and can confirm that the fitter no longer hangs and the hold time violation is no longer present.

Is this setting in the quartus.ini file recommended to be used as default? Or is there some drawback to use it?

Thanks for your support.