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Hi,
I saw some hold time violation when I trying to run the STA.
I believe the problem is because the source and destination FFs of this path are on different clock domains, and the tool thinks there is large skew between these domains. skew= 5.42, data delay = 3.17, the slack is around -2.3.
so is there anything I can do to fix this problem?
Thanks!!!!
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How are the two clocks related? Are they the same frerquency, different phases? Or different frequencies? Derived from same source, or different input sources?
If you know enough about the relationship of the clock waveforms you should be able to setup timing relationships for the data transfer (setup, hold, multicycle).
Otherwise if the sources are asynchronous you will need to setup a false timing path to remove the timing check (and implement the appropriate synchronizer logic as well).
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