Help using transceivers in HDMI-port on Arria V GX starter board to send TMDS data

I am working on a project where I want to send TMDS data to a monitor using the HDMI-port on my Arria V GX starter board. I have only limited experience form VHDL design and have also only worked with Xilinx before, and never transceivers.

I am using a Arria V GX starter board with a 5AGXFB3H4F35C4N FPGA and Quartus II 13.0.

For a couple of days I been trying without success to send something using the 1.5-VPCML transceivers.

What I want to achieve is to send 3 x 10bit that comes in parallel at 148.5Mhz using 3 transceiver lanes sending at 1485 Mbps. I also want to send the 148.5Mhz clock over a transceiver output.

Whether I am trying with one or more lanes I am stuck with these errors and critical warnings respectively:

Error (175020): Illegal constraint of Transmitter channel to the region (169, 11) to (169, 11): no valid locations in region
    Info (175028): The Transmitter channel name: hdmi_tx_p
    Error (175005): Could not find a location with: PMA_DIRECT_CHANNEL (1 location affected)
        Info (175029): Transmitter channel containing PIN_AJ3
    Info (175015): The I/O pad is constrained to the location PIN_AJ3 due to: User Location Constraints (PIN_AJ3)

Critical Warning: HSSI PMA TX Serializer port 'CLKDIVTX' on node PHYnat_Tx:Trans|altera_xcvr_native_av:phynat_tx_inst|av_xcvr_native:gen_native_inst.av_xcvr_native_insts.gen_bonded_group_native.av_xcvr_native_inst|av_pma:inst_av_pma|av_tx_pma:av_tx_pma|av_tx_pma_ch:tx_pma_insts.av_tx_pma_ch_inst|tx_pma_ch.tx_pma_ser should be connected
    Info: Must be connected
Critical Warning: HSSI PMA TX Serializer port 'CLKDIVTX' on node PHYnat_Tx:Trans|altera_xcvr_native_av:phynat_tx_inst|av_xcvr_native:gen_native_inst.av_xcvr_native_insts.gen_bonded_group_native.av_xcvr_native_inst|av_pma:inst_av_pma|av_tx_pma:av_tx_pma|av_tx_pma_ch:tx_pma_insts.av_tx_pma_ch_inst|tx_pma_ch.tx_pma_ser should be connected
    Info: Must be connected
Critical Warning (11087): PMA direct channel(s) detected and needs to be constrained based on the guidelines in Arria V Device Handbook Volume 3: Transceiver chapter
Critical Warning (184043): Fitter was unable to find Transceiver Reconfiguration Controllers associated with the following 2 XCVR PHY IP component blocks
    Info (184044): Avalon Memory Map block PHYnat_Tx:Trans|altera_xcvr_native_av:phynat_tx_inst|av_xcvr_native:gen_native_inst.av_xcvr_native_insts.gen_bonded_group_native.av_xcvr_native_inst|av_xcvr_avmm:inst_av_xcvr_avmm|avmm_interface_insts.av_hssi_avmm_interface_inst
    Info (184044): Avalon Memory Map block PHYnat_Tx:Trans|altera_xcvr_native_av:phynat_tx_inst|av_xcvr_plls:gen_native_inst.av_xcvr_native_insts.gen_bonded_group_plls.gen_tx_plls.tx_plls|pll.avmm.av_hssi_avmm_interface_inst
Error (175020): Illegal constraint of Transmitter channel to the region (169, 11) to (169, 11): no valid locations in region
    Info (175028): The Transmitter channel name: hdmi_tx_p
    Error (175005): Could not find a location with: PMA_DIRECT_CHANNEL (1 location affected)
        Info (175029): Transmitter channel containing PIN_AJ3
    Info (175015): The I/O pad is constrained to the location PIN_AJ3 due to: User Location Constraints (PIN_AJ3)

And some additional warnings which I think are irrelevant.

I am using a Native PHY IP core in direct PMA mode and have assigned the pins the I/O standard 1.5-VPCML. What might be the problem? Am I on the completely wrong track?

Your help will be highly appreciated!

Best regards,

Aron