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Altera_Forum
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15 years ago

help in for loop

sir,here is my small code library IEEE; use IEEE.STD_LOGIC_1164.ALL; use ieee.std_logic_unsigned.all; use ieee.std_logic_arith.all; -- Uncomment the following library declaration if usin...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

--- Quote Start ---

k1 : for i in 0 to 4 generate

result <= conv_integer(signed(f))*i;

b <= conv_std_logic_vector(result,7);<--- error in this line.

end generate;

--- Quote End ---

A common misunderstanding of HDL loops:

Your loop is unrolled at compile time to:

result <= conv_integer(signed(f))*0;

b <= conv_std_logic_vector(result,7);

result <= conv_integer(signed(f))*1;

b <= conv_std_logic_vector(result,7);

result <= conv_integer(signed(f))*2;

b <= conv_std_logic_vector(result,7);

result <= conv_integer(signed(f))*3;

b <= conv_std_logic_vector(result,7);

result <= conv_integer(signed(f))*4;

b <= conv_std_logic_vector(result,7);

so bothe result and b are driven by multiple statements. If loop was in a sequential body then last statement overrides and even then it becomes meaningless.

You better tell us what do you want to do.