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Altera_Forum's avatar
Altera_Forum
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17 years ago

help: about flash programming

hi,when i do my flash programming,it shows the following tips:

-------------------------------------------------------------------# !/bin/sh# # This file was automatically generated by the Nios II IDE Flash Programmer.# # It will be overwritten when the flash programmer options change.#

cd D:/altera/work/flash_access/software/memtest_0/Debug

# Creating .flash file for the project

"$SOPC_KIT_NIOS2/bin/elf2flash" --base=0x01400000 --end=0x17fffff --reset=0x1400

000 --input="memtest_0.elf" --output="cfi_flash.flash" --boot="D:/altera/80/ip/n

ios2_ip/altera_nios2/boot_loader_cfi.srec"

# Programming flash with the project

"$SOPC_KIT_NIOS2/bin/nios2-flash-programmer" --base=0x01400000 --instance=0 "cfi

_flash.flash"

Using cable "USB-Blaster [USB-0]", device 1, instance 0x00

Resetting and pausing target processor: OK

No CFI table found at address 0x01400000

Leaving target processor paused

-----------------------------------------------------------------------

i don't kown what's the CFI talbe and, how i add the table?

when i choose run->niosII hardware,the console tips as follows:

------------------------------------------------------------------------

Using cable "USB-Blaster [USB-0]", device 1, instance 0x00

Processor is already paused

Initializing CPU cache (if present)

OK

Downloading 01400000 ( 0%)

Downloading 01410000 (73%)

Downloaded 88KB in 1.5s (58.6KB/s)

Verifying 01400000 ( 0%)

Verify failed between address 0x1400000 and 0x140FFFF

Leaving target processor paused

----------------------------------------------------------------------

how should i do to solve these problems? i'm very appriciate if you can offer any help.

10 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    There are few things you need to look at:

    1. Open SOPC builder and check your CFI controller is placed on 0x01400000 and exception is not given on CFI (if reset vector is on flash, it is OK)

    2. You have selected correct size and timing parameters in CFI controller which matches your flash device on board

    3. You have downloaded same .sof file and generated project using .ptf file from same project

    4. Make sure Flash programmer's current instance is taking reference of same nios project you are working on (else you just delete all instances of flash programmer and re instance again by selecting your working project)

    5. Check System Library Properties of Nios II project and make sure read/write memory, stake memory, heap memory are not falling into flash device. Keep it in volatile device like sdram or ssram or onchip ram.
  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    lw,

    Further to Ketan's suggestions:

    You ask what the CFI table is. This is a table which is built-in to CFI compliant flash devices. If it can't be found, it suggests the flash in non-compliant (unlikely) or there's a problem with your hardware setup.

    As well as reading the Altera Flash Programmer manual, I'd try searching for 'CFI' or 'flash programmer' on this forum and the NIOS forum, where it's been discussed on several occasions.
  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    hi ketan, thank you . my reset vector and exception vector were set on CFI,offset is 0x0 and 0x20. In system library properties,i set .text and .rodata in CFI and .rwdata,heap memory and stack memory in sdram. And the timing parameters were all recommend values. and i checked every other aspects you have referd to, it's no problem. But the error is still so. I don't kown why.

    hi,sharkybaba, thank you for your explantion about cfi table. my falsh is spansion s29al032d. but the same problem remains.[url="http://www.alteraforum.com/forum/member.php?u=2246"] (http://www.alteraforum.com/forum/member.php?u=2246)[/URL]
  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    Hi lw,

    Could you give us more details about your board? Is it a new design or a development kit?

    There are all sorts of reasons why the flash might be inaccessible, such as bus contention, incorrect connection of address lines etc.
  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    hi sharkybaba, my board DE1(EP2C20F484F7) . Now i'm doing a flash test program. and i have setup ip library ,which contain some components on de1 board in my computer. the board have 8 green led and 10 red led,and i want to light the led from my program.

    ps: rt.bmp is my sopc cut-image.
  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    Can you get the flash to program by using one of the standard projects supplied with the DE1 kit? If you're using your own project, make sure that all the signals to the flash are correctly connected. Is the flash reset line held high?

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    --- Quote Start ---

    my reset vector and exception vector were set on CFI,offset is 0x0 and 0x20. In system library properties,i set .text and .rodata in CFI and .rwdata,heap memory and stack memory in sdram.

    --- Quote End ---

    The other suggestions are all valid. Not being able to read a CFI table is a non-starter. You won't make any progress until this issue is solved. Didn't your board come with a functional example design containing a CFI flash?? If so, why aren't you starting with that design and building?

    Additionally, it's not common (and extremely slow) to place the Exception Address and all code sections in flash. What I've done, most of the time, is point the Reset Address to non-volatile memory (i.e.: CFI Flash) and the Exception Address and all code sections to volatile memory (i.e.: SDRAM, onchip memory, etc.). It's the bootloader's job to copy the code sections, where they reside as payload in CFI flash, to a volatile memory location.

    Cheers,

    - Ura
  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    hi , there is no test or stander project about CFI offered with DE1 kits.i have look up the flash mamul, the reset is low voltage in effect. i have checked every step and pin assignments,it's no problem. And still it messages "No CFI table found at address 0x01400000".

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    --- Quote Start ---

    there is no test or stander project about CFI offered with DE1 kits

    --- Quote End ---

    Are you sure? I downloaded the latest kit (v7) from here (http://www.terasic.com/downloads/cd-rom/de1/), and it appears to have a DE1_NIOS demonstration that has it's Reset Address in the CFI flash. I don't have the DE1 to test this design, but it sure looks like a good start to me.

    At the very least, you should give it a try and contact Altera (Terasic really) if you have further issues. Until you can successfully access your CFI flash, you're dead in the water.

    Cheers,

    - Ura
  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    lw860123,

    Go both to Altera and Terasic web sites. Download all the CD kits and samples for the DE1 at both sites. You'll get a lot of overlap, of course. But there are some samples that are provided only by Altera, others only by Terasic.

    Note that the DE1 is named as "Cyclone II FPGA Starter Development Kit" by Altera.