Forum Discussion
ESaiv
New Contributor
New ContributorHello! I am wondering if there is any way to utilize the 2.5 V LVDS differential IO using the DE1-SoC or DE10-Nano boards through the GPIO headers.
It appears from the "I/O Standards Specifications" section of the Cyclone V Device Datasheet that VCCIO for accepting LVDS data is at (or pretty close to) 2.5 V only, and unfortunately I can't see a ...
YuanLi_S_Intel
Regular Contributor
Regular ContributorHi Elliot,
Can you please check if any of the pin is connected to the GPIO or HSMC on the board? If it so, that particular pin can be changed to LVDS using Quartus and thus you may use it.
Of course, it would be better to build it on a custom board for desired design.
Thank You.
ESaivNew Contributor
New ContributorHi! Thanks for your reply. Are you suggesting that if I had HSMC on the board that I would be able to run LVDS into it? This makes good sense to me, though unfortunately I do not think I have that interface on the DE1 or DE-10, and only have GPIO, and these GPIO are of the wrong IO voltage standard (3.3 V, where I indeed need 2.5 V for LVDS for the Cyclone bank voltage). I agree that a custom board might be the best approach in this case. Thanks for your input.
