Forum Discussion
JEL_W
New Contributor
New ContributorHello everyone, I need your help I'm using ADC AD9254 and DAC 5672, with FPGA DE10 standard, I want to acquire data, so Implement this code: the data out is associated to The dac, I get the result below:
LIBRARY ieee; USE ieee.std_logic_1164.all; LIBRARY work; ENTITY Co IS port (clk: in std_logic; reset: in std_logic; DCO: in std_logic; Data_valid: out std_logic; Data_in:...
IDeyn
Contributor
ContributorHi JEL W,
It looks like you missed a sign, either in code or in DAC or ADC settings, where you probably need to choose two's complement instead of offset binary which is chosen by default.
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Best regards,
Ivan
