Forum Discussion
JEL_W
New Contributor
New ContributorHello everyone, I need your help I'm using ADC AD9254 and DAC 5672, with FPGA DE10 standard, I want to acquire data, so Implement this code: the data out is associated to The dac, I get the result below:
LIBRARY ieee; USE ieee.std_logic_1164.all; LIBRARY work; ENTITY Co IS port (clk: in std_logic; reset: in std_logic; DCO: in std_logic; Data_valid: out std_logic; Data_in:...
JEL_WNew Contributor
New ContributorHi
I sent a sinusoidal signal through low frequency generator to ADC , but I didn't manage to get the same signal at the output of DAC,
I get an inversed signal, the question is how can I obtain the same signal, Did I miss something in the code ?
Thank you
corestarContributor
Is your DAC exepcecting signed or straight binary. Same for the ADC. What you are seeing is almost right and very common when there is a signed unsigned conflict. For example, if your ADC is returning a signed number, but your DAC expects straight binary, but you fail to offset it, you will see something like what you show.
