Hello everyone,
I need your help
I'm using ADC AD9254 and DAC 5672, with FPGA DE10 standard,
I want to acquire data, so Implement this code:
the data out is associated to The dac, I get the result below:
LIBRARY ieee; USE ieee.std_logic_1164.all; LIBRARY work; ENTITY Co IS port (clk: in std_logic; reset: in std_logic; DCO: in std_logic; Data_valid: out std_logic; Data_in:...