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Altera_Forum
Honored Contributor
15 years agohaving problem for simulation
hii alll!!!! I am using Quartus II ver10.1,earlier i was using ver 9.0 at that time i was comfortable for doing simulation by drawing Vector waveform files. I read the whole document for introdu...
Altera_Forum
Honored Contributor
15 years agoI had not got the procedure to simulate a design..
please tell me in short what to do after writing a test bench in Verilog.. Please Please help me soon.:D