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Altera_Forum's avatar
Altera_Forum
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12 years ago

Hard Memory Controller DDR3 unused pins as IO ?

Hi, I am using both HMC on my Cyclone V A7. According to http://www.altera.com/literature/hb/cyclone-v/cv_52006.pdf all excess DQ and DQS can be used as IOs. But what about the other control p...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Ask Quartus. That is the only answer you can believe :)

Create a design that uses the HMC and then uses the remaining pins for I/Os.

Quartus performs checks for simultaneous switching noise (SSN) and will sometimes disallow some I/O assignments unless you indicate that the pin is slow via an I/O toggle rate assignment.

Cheers,

Dave