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Altera_Forum
Honored Contributor
Honored ContributorHandle DMA Page address received at the FPGA end during DMA transfer
Scatter Gather DMA transfer of 461KB is initiated from the Host PC to the ARRIA2GX FPGA using Jungo Driver. During the transfer apart from the actual data sent as input data , extra data which ...
Altera_ForumHonored Contributor
Honored ContributorThen there shouldn't be any problem from the SGDMA itself. Did you try to use signaltap on the avalon stream to see if those packets are actually coming from the PCIex core of if it is something else? Are you using a Nios CPU in the FPGA to access the data? In that case are you bypassing the CPU's data cache when you read the packet contents?
