Forum Discussion
Deshi_Intel
Regular Contributor
5 years agoHi,
I suspect fitter error is just due to some channel pin placement issue and not about Quartus design connection or RTL error.
This is due to once I disable your pin location setting in your Quartus project (let Quartus auto fit pin placement) then fitter compilation can passed.
- I didn't check all your pin placement vs Quartus compilation passed pin placement yet but at high level I can see that your bank 1F Rx{3:2] location is swap.
I encourage you to do the same like me. Let Quartus auto fit then compare with your original pin location setting then you will figure out which pin placement is causing the problem here
Thanks.
Regards,
dlim
clair
New Contributor
5 years agohi,