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Altera_Forum
Honored Contributor
11 years agoGXB 0 PPM core clock setting witn coreclck
i don't arrive to used "GXB 0 PPM core clock setting" in assignement editor. I want to used only one clock to write in the TxFiFO, and to read the RxFIFO. I always have the same error: E...
Altera_Forum
Honored Contributor
11 years agoThanks
this error is: "Error (167028): Input port CORECLK of GXB Transmitter channel PCS "MyGx_I_corelclk:inst9|MyGx_I_corelclk_alt4gxb:MyGx_I_corelclk_alt4gxb_component|transmit_pcs0" must be fed by output port CLOCK_OUT of GXB Transmitter channel PCS "MyGx_I_corelclk:inst9|MyGx_I_corelclk_alt4gxb:MyGx_I_corelclk_alt4gxb_component|transmit_pcs0" because the GXB transmitters have the same clock rate or are operating in bonded x4/x8 mode " We don't want to use Quartus II 15.0 for the moment (cause compatibility between developpers on differents platforms) Is there a solution to parametrize this assignement "GXB 0 PPM core clock setting " with quartus II 13.0?????