GXB 0 PPM core clock setting witn coreclck

It's ok, if I connect tx_clkout to tx_coreclk, no errors from quartus.

but i want to connect the same clock (Clk200M) who drive the pll_inclk pin to the tx_coreclk pin. this clock as the same frequency that the "tx_clkout",

and it seam possible to drive tx_corelck with this clock (clk200M).

if this schem work, I will make the same connexions for rx_corelck, and for all the others channel.

This schem will allows me to drive all the signals of the GXB with the same clock, without the need

to change clock domains from tx(rx)_ clkout to clk200M.

Here is an image of my design.https://www.alteraforum.com/forum/attachment.php?attachmentid=10923

Thanks