Forum Discussion
Ash_R_Intel
Regular Contributor
4 years agoHi,
Please let us know which FPGA device you are targeting to.
You may refer to documents available:
- AN-731: Simultaneous Switching Noise Guidelines for Intel Cyclone 10 LP, Cyclone IV, and Cyclone III Devices
- Device design guidelines
- AN 75: High-Speed Board Designs
- Pin connection guidelines
Regards.
- Karunakaran4 years ago
New Contributor
Targeting to Max 10 10M08SAU169I7G