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Altera_Forum's avatar
Altera_Forum
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14 years ago

glitich in the outputs

i am getting some glitiched in the outputs, i am not sure what is the reason of then glitich and how to get rid of them, the glitichs happen in the output that are not changing
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Standard Mealy or Moore FSM designs, e.g. the Quartus HDL templates don't register the output signals, resulting in glitches. You should register those signals, that are fed to output pins.

Another option to design the FSM in a single clocked process. All signals will be registered without specific means.