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Altera_Forum's avatar
Altera_Forum
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15 years ago

Genvar: Shift Register

I would like to implement a set of 32bit shift register using genvar. However, i wonder why the input and output of my block is always 1 bit only instead of 32.

The code is attached.

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    I have detected the mistake done. The name of submodule to be instantiated is wrong.

    thanks