Generating a signal (a VHDL description) with a well-defined frequency in a FPGA

Your question isn't quite clear. I understand that you are talking about a signal generator in hardware, not in simulation. The possibilities to implement test signals in simulation are basically unlimited. In synthesized hardware, the suitable method depend on the intended signal characteristics, which hasn't been mentioned yet.

P.S.: A comment regarding the implementation of an UHF transceiver in FPGA. This is possible of course, but according to the yet revealed details, a 1$ (or so) wireless chip should do the same. It already contains a full featured digital transceiver. Unless you're planning completely new wireless protocols or very specific features, the FPGA solution seems to be a somewhat longwinded approach, but instructive indeed.