Generating 400MHz external clock (Cyclone V)

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ah_zhi02 is right. The Cyclone V PLL can support up to 667MHz clock output according to the device datasheet. Thus, there should not be issue achieving 400MHz output.

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That is actually not quite correct. The clock output from the PLL still has to pass through the IO circuitry like any other IO pin, so the IO switching limitations for the speed grade of the device apply (there is a footnote in the datasheet which mentions exactly this). The fastest speed grade (C6) can achieve 420MHz rate, the slower devices are rated at lower than 400MHz speeds.