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Altera_Forum's avatar
Altera_Forum
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10 years ago

Generating 400MHz external clock (Cyclone V)

Hello, I'm trying to generate a 400MHz clock signal from my Cyclone V in order to drive the clock input for an external ADC, but I'm getting severe attenuation on the clock signal. Details: ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Thanks everyone for your replies,

Based on what you've said I'm sure my readings can be further be improved via better probing. First off, by switching to a better probe (500MHz rated & 8pF) and realizing the scope was set to default BW of 250MHz then changing this to 500MHz, the p-p swing increased to 300mV @400MHz. My ADC requires minimum 500mV p-p swing for its clock input.

When the datasheet says PLL can support 667MHz, at what p-p swing is this? I can't test it cleanly with the ADC yet (need different connectors) but it'd be good to know that >500mV is possible @400MHz.

Thanks