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Altera_Forum
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11 years ago

Generating 400MHz external clock (Cyclone V)

Hello, I'm trying to generate a 400MHz clock signal from my Cyclone V in order to drive the clock input for an external ADC, but I'm getting severe attenuation on the clock signal. Details: ...
Altera_Forum's avatar
Altera_Forum
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11 years ago

Hi si09ath,

Perhaps you might want to share the screen shot so that everyone could have better idea what you are facing.

I don't think there are any hardware limitation on FPGA to output 400Mhz but if you would like to confirm that, instead of output using ALTLVDS. Use the SERDES to output a repeated 10101010

Also I don't think there is anything wrong with a 1 GHz scope unless is setting. Try pressing the AUTO button then let the scope final best setting to probe. Then check the board if there if there are any cap