Altera_ForumHonored Contributor16 years agoFunctional simulation vs Timing Hi, I'm trying to plan an entity that recieves 2 6 bits words and decides if there are 3 or more different bits between those two words. If there are 3 or more bits that differs - the output turns...Show More
Recent DiscussionsFFVH-ICS-0923-00(1SM21BHU2F53E2VGNE)failed at ESS-HOT testAgilex 3 BB18A package - patching MSEL1 and MSEL2 on interposerCyclone-V SCFIFO - adding ECC to M10K/MLAB/Auto memoryDifferent FPGA model shows: DEV-AGM039EAQuartus Pro simulation libraries for Riviera Pro