Altera_ForumHonored Contributor16 years agoFunctional simulation vs Timing Hi, I'm trying to plan an entity that recieves 2 6 bits words and decides if there are 3 or more different bits between those two words. If there are 3 or more bits that differs - the output turns...Show More
Altera_ForumHonored Contributor16 years agoi would also use signals for x. i dumped the code into Quartus, it doesn't optimize C out.
Recent DiscussionsError (209014): CONF_DONE pin failed to go high in device 1.Implementation of lower data rate.eFUSE : Agilex F series and AGilex I series PCIe cardIP components used in the design have conflicting settings. Intel PCIE Ftile MCDMAEP4CGX22CF19C8N Failure Short D8 to C8