Hi,
As I understand it, you have some inquiries related to how to create a logic which could generate a chirp signal in the FPGA. This seems to be trending towards design implementation inquiry. For your information, generally in this Forum, we would be addressing specific inquiries related to FPGA ie device, IP but not design implementation. Sorry for the inconvenience. However, I will try our best to assist you to my best knowledge.
For your information, as I search through the web, the following are some links which you may further look into to see if it is helpful. They seems to be using Matlab to achieve the chirp signal. Note that I am not a design specialist, thus could not really comment on the design implementation.
https://www.mathworks.com/help/thingspeak/remove-dc-component-and-display-results.html
https://www.matec-conferences.org/articles/matecconf/pdf/2017/42/matecconf_eitce2017_04009.pdf
Please let me know if there is any concern. Thank you.
Best regards,
Chee Pin